How do you make code which only gets compiled for platforms which can perform unaligned reads? - optimization

Question

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Thanks to your help, I've just published my first crate: crates.io/crates/levarint64 (It still needs work...)
The purpose of the function below is to speed-up (possibly unaligned) u64 reads from slices.
The optimised function compiles to mov rax, qword ptr [rdi] on x86_64 and ldr x0, [x0] on aarch64. (The unoptimised version (when used on a little-endian platform) gets compiled to the same assembly, but often explodes into more than sixteen instructions when inlined at -O3.)
This code is not yet correct (see the FIXME):
// Unoptimised version, suitable for both endianesses and any lack of unaligned reads.
#[cfg(target_endian="big")]
fn u64_from_slice(slice: &[u8]) -> u64 {
debug_assert!(slice.len() >= size_of::<u64>());
unsafe {
*slice.get_unchecked(0) as u64 |
((*slice.get_unchecked(1) as u64) << 8) |
((*slice.get_unchecked(2) as u64) << 16) |
((*slice.get_unchecked(3) as u64) << 24) |
((*slice.get_unchecked(4) as u64) << 32) |
((*slice.get_unchecked(5) as u64) << 40) |
((*slice.get_unchecked(6) as u64) << 48) |
((*slice.get_unchecked(7) as u64) << 56)
}
}
// FIXME: This is only valid on architectures which can perform unaligned reads.
#[cfg(target_endian="little")]
pub fn u64_from_slice(slice: &[u8]) -> u64 {
debug_assert!(slice.len() >= size_of::<u64>());
unsafe {
let r = &*(slice as *const [u8] as *const [u8; size_of::<u64>()]);
*mem::transmute::<&[u8; size_of::<u64>()], &u64>(r)
}
}
Many years ago I worked on ARM architectures where unaligned reads caused an aligned read followed by a rearrangement of the bytes so that the u8 or u16 at that address was moved to the lowest bits of the register.
In this case, my target_endian="little" isn't sufficient to make the code above correct.
How do I make sure that those ARM architectures (and possibly others) are excluded from running the optimised version?

Answer 1

The optimised function compiles to mov rax, qword ptr [rdi] on x86_64 and ldr x0, [x0] on aarch64.
Is it really such a useful gain when from_le_bytes is so very close, and an unreachable_unchecked() in the failure branch basically gets you there? The only thing both retain is a branch on the size of the slice, but that should be a ridiculously well predicted branch.
Many years ago I worked on ARM architectures where unaligned reads caused an aligned read followed by a rearrangement of the bytes so that the u8 or u16 at that address was moved to the lowest bits of the register.
You might be thinking about ARMv6 and older, especially ARMv5 and down, which would round address down to a multiple of 4 then possibly do weird rotations.
AVMv8 supports unaligned reads just fine, at least for most operations, though there may be a perf hit.
How do I make sure that those ARM architectures (and possibly others) are excluded from running the optimised version?
I think explicitly enumerating with target_arch is your least bad bet, it'll probably leave perfs on the table as handling of unaligned read is not always an ISA property (especially when it comes to performance profile).

Answer 2

While not resolving the original question, I was able to satisfy my requirements with no unsafe code, by not using slices at all:
#![feature(slice_as_chunks)]
...
pub fn u64_from_first_eight(buf: &[u8; 9]) -> u64 {
let parts: (&[[u8; 8]], &[u8]) = buf.as_chunks();
u64::from_le_bytes(parts.0[0])
}
pub fn u64_from_last_eight(buf: &[u8; 9]) -> u64 {
let parts: (&[u8], &[[u8; 8]]) = buf.as_rchunks();
u64::from_le_bytes(parts.1[0])
}
These generate efficient assembly code.
x86_64:
example::u64_from_first_eight:
mov rax, qword ptr [rdi]
ret
example::u64_from_last_eight:
mov rax, qword ptr [rdi + 1]
ret
aarch64:
example::u64_from_first_eight:
ldr x0, [x0]
ret
example::u64_from_last_eight:
ldur x0, [x0, #1]
ret
Update: Thanks to Chayim Friedman, I now have the following code which does not depend on nightly features, and yet compiles to the same single assembly instructions.
pub fn u64_from_low_eight(buf: &[u8; 9]) -> u64 {
let bytes: &[u8; size_of::<u64>()] = buf[..size_of::<u64>()].try_into().unwrap();
u64::from_le_bytes(*bytes)
}
pub fn u64_from_high_eight(buf: &[u8; 9]) -> u64 {
let bytes: &[u8; size_of::<u64>()] = buf[1..(size_of::<u64>()+1)].try_into().unwrap();
u64::from_le_bytes(*bytes)
}