In AMPL command-line interface, we can set options for a particular solver with the command :
option cplex_options 'absmipgap=0.01';
In above command, we are setting options for CPLEX solver.
All options for various solvers are listed at : https://dev.ampl.com/en/latest/solvers/options/cplex.html
However, how to display or get the value of a particular option or all options of a particular solver in AMPL command-line interface?
Related
I've recently moved to Gurobi and we use GAMS.
Have been struggling to implement Gurobi options, is there a way to use Gurobi options directly? With a file or something like that.
For instance, I want to use the following options and have not found a GAMS correspondence:
Scaleflag;
MIPFocus;
Thank you in advance,
I have a piece of Verilog code here
$size(data);
where data is a 16-bit number.
But, it gives an error in Vivado.
error: system call size not allowed in this dialect use system Verilog mode
I have tried searching for a solution, but no luck, hence posting it here.
The error message means that the $size system function can only be used if SystemVerilog features are enabled in Vivado. One way to do so is to give your files a .sv extension.
I'm using Optaplanner to solver a TWVRP problem, with the "delay until last" pattern to enable multiple workers performing some tasks. The cycle detection needed for that scales horribly with the problem size, so I would like to run the local search phase only if the problem size is below some threshhold. How can I accomplish that? For instance,
if(problemSize < X){
solveWithCHandLS(problem)
}else{
solveWithCHonly(problem)
}
OptaPlanner configuration can optionally be coded. So instead of giving OptaPlanner the XML or the properties in Quarkus, you can code your own solver config:
SolverConfig solverConfig = new SolverConfig();
From there, use your IDE code completion to discover the API. It is more or less a 1-to-1 mapping to the solver config XML. When you are done building your solver config, you need to build your solver from it:
SolverFactory<...> solverFactory = SolverFactory.create(solverConfig);
Solver<...> solver = solverFactory.buildSolver();
For each of your problem sizes, create a different config and build a solver from the config that is appropriate in the moment.
Does anyone know how to disable "presolve" in CPLEX? (without using Java, C++, etc.)
My CPLEX Version is 12.4, in case it makes a difference.
Thanks in advance,
Although the question was asked for OPL, it is also useful to know how to do this in Java/CPP/interactive optimizer.
Solution: set parameter preind to false
Java: IloCplex.Param.Preprocessing.Presolve E.g. java: cplex.setParam(IloCplex.BooleanParam.PreInd, false);
CPP: IloCplex::Param::Preprocessing::Presolve
C: CPXPARAM_Preprocessing_Presolve
.net: Cplex.Param.Preprocessing.Presolve
Iteractive optimizer: preprocessing presolve
See: http://www-01.ibm.com/support/knowledgecenter/SSSA5P_12.6.2/ilog.odms.cplex.help/CPLEX/Parameters/topics/PreInd.html
After trying to find how certain parameters can be changed in CPLEX, I have found the answer to my own question.
To change parameters (using CPLEX only) you don't need to type in any code. All you have to do is creating a "Settings" file within your project file.
You can follow these steps:
In the "OPL Projects" window right click and select "New->Settings"
Give a name to your settings file and click OK.
Change the parameters as you wish (to find the related setting you can type in the name of the parameter in the search bar, in my case it worked when i searched for "Preprocessing". From the menu that appeared I unchecked the box called "Presolve indicator")
Add the "Settings" file to your desired Run Configuration file to apply changes. In this case, CPLEX uses the parameters in your Settings file instead of the default values.
And that is all :)
I am using Vivado for running my Verilog codes. Even though I do not see any errors while running synthesis and implementation, bitstream cannot be built.
This is the error I get:
ERROR: [Drc 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 12 out of 12 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected.
Which also suggests:
To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command:
set_property SEVERITY {Warning} [get_drc_checks NSTD-1]
NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.
Which comes down to how can I script in Tcl using Vivado? I added the suggested command to the tcl console but I still get the same error.
I sugest you do what the tool is telling to do, which is specify IO standard for your top level ports, for example, if you have sys_rst_n top level port you may add the following line to your .xdc constraint file:
set_property IOSTANDARD LVCMOS18 [get_ports sys_rst_n]
of course you should change LVCMOS18 to match IO standard of you port.
The error you get is really not a Tcl issue.
YOU WANT to fix these IOs, otherwise you may damage your hardware.
open the routed checkpoint (dcp)
using the IO port window fix the IOs that have default IO standard (one by one if needed)
create the bitstream from the tcl window
Here's how to create a .tcl to fix this without having to re-implement the whole project:
copy the commands that ran to fix the IOs from above (from the tcl console) and put the commands in a tcl file
add this tcl file as a hook to "post route physopt" so the tcl runs automatically when this last step in the implementation flow.
if you'll be rerunning implementation in the future, you should just place the commands in the project xdc file instead.