How to set up a physical memory protection in riscv? - embedded

Question

I am trying to write a small software that uses riscv PMP. I'm using SaxonSoc https://github.com/SpinalHDL/SaxonSoc. Which means, I have access to the hardware description and to simulation waves.
I am trying to understand why this small test is not working ? :
int main (){
volatile uint32_t * volatile mem=(uint32_t * volatile)( SYSTEM_RAM_A_CTRL+ 0x2000) ;
*mem=0x15;
main_println32x("mem :",*mem);
u32 new_pmpcfg0 =1<<7 ; //setting the L bit so restructions can be applied to M mode
new_pmpcfg0 =(new_pmpcfg0) | 3<<3 ; // A=3=NAPOT ; R=W=X=0
u32 new_pmpaddr0=(u32)( SYSTEM_RAM_A_CTRL+ 0x2000) ;
__asm__ volatile ("csrw pmpaddr0, %0"
: /* output: none */
: "r" (new_pmpaddr0) /* input : from register */
: /* clobbers: none */);
__asm__ volatile ("csrw pmpcfg0, %0"
: /* output: none */
: "r" (new_pmpcfg0) /* input : from register */
: /* clobbers: none */);
*mem=0x19; // I expect an exception here
main_println32x("mem :",*mem);
}
Simulation shows that the csr registers are configured correctly :
But unfortunately, I don't get the exception I'm waiting for.
Any idea about what I am missing here ?

Answer 1

My first thought would be that the pmpaddr is not set correctly. As you are using a NAPOT encoding, the start address and the region size is encoded as per Table3.10 in the RiscV privileged specs.
I would suggest to test it by setting pmpaddr ='1 (all ones) to cover the whole address space, so the address you are accessing will be matched against that pmp region. Then it should throw an exception as it violates the access permissions.