I would like to allow the user to tell me how many numbers they would like to enter then allow them to enter them and store them in an array.I would like to call it myArray
I cannot find anything clear anywhere.
print_str ("How many numbers would you like ot enter? ")
li $v0, 5 #taking input in from user
syscall
move $s7, $v0
li $s6, 0 ` # i = 0
inputLoop:
bgt $s6, $s7, exitInputLooop
li $a0, $s7
sll $s7, $s7, 2 #user input x 4 for mememory allocation
li $v0,9 # (1) Allocate a block of memory
li $a0, ($s7) # 4 bytes long
syscall # $v0 <-- address
move myArray, ($s7) # (2) Make a safe copy
addi $s6, $s6, 4 #i++
exitInputLoop
Related
I'm getting started with a program in MARS MIPS that will allow the user to input something in the MMIO input window in the form of "x+y=" and get "x+y=z". However, I just don't really know where to start. I have the basics setup, but I need to write an entire interrupt handler.
I'm using MARS MIPS< and have enabled the interrupt bit, but that's about all I've figured out.
.text
main:
#Turn on the interupt enable bit
lui $t0, Oxffff
lw $t1, 0($t0)
ori $t0, $t1, 0x0002
sw $t1, 0($t0)
.data
expBuffer: .space 60
expBuff: .word 0
.ktext 0x80000180
#Store all used registers
#Recover all used registers
.kdata
#Registers
So, I am working on a program in ARM that takes a bunch of numbers from a file and tells if they are even or odd.
The problem is that I know how to multiply by 0.5, but I don't know how to do something like this high level statement in ARM
if (A / 2 == 0)
print even
else
print odd
Here's what I have in terms of code:
#open input file
ldr r0,=FileName # set Name for input file
mov r1,#0 # mode is input
swi SWI_Open # open file for input
bcs InFileError # if error?
ldr r1,=InFileHandle # load input file handle
str r0,[r1] # save the file handle
#read integers from input file
NUMBERS:
ldr r0,=InputFileHandle # load input file handle
ldr r0,[r0]
swi SWI_RdInt # read the integer into R0
bcs EofReached # Check Carry-Bit (C): if= 1 then EOF reached
#multiplication by 0.5 to test for odd or even
MUL R2 R0 0.5
#what is the test in ARM
#for ( R0 / 0.5 ) == a multiple of 1?
B NUMBERS
LOOP:
#end of program
Message1: .asciz"Hello World!"
EOL: .asciz "\n"
NewL: .ascii "\n"
Blank: .ascii " "
FileName: .asciz"input.txt"
.end
So I think the first two things inputting from the file and reading the integers works. I don't know how to test for the condition that it is divisible by 2. I think it's multiplied by 0.5 and then the next step is to say even if that number doesn't have a decimal place with anything after it at the end, but if it does then then number A that was divided into number B is odd. Otherwise it is even?
A brief answer: you don't need to multiply by 0.5 or anything like that. You need to check the value of LSB (least significant bit) of the value. It will be 0 for even numbers and 1 for odd numbers.
Upd.: your "C" code is also wrong. You want to use A % 2, not A / 2
I have a section of code that I'd like to reuse, while changing only one register in one instruction. The initial register is $f18 in coproc1, and each time this code is run I want it to use the next COP1 register (max of 4 times). In this case I am very limited on memory and available GPR registers so I would not like to make a separate subroutine for this.
I know I can use self-modifying code to change the actual instruction, but doing so seems to require me to know the exact address of the line in question. This makes developing my code difficult because the size will constantly fluctuate until I'm finished.
Is it possible to reference a memory address by label+offset?
And is there a better way to do this using very few instructions and additional registers?
calc_and_add_color:
srl $t2, $t2, $t0
andi $s2, $t2, 0x1F
mtc1 $s2, $f22 #f22 is now red/green/blue component
cvt.s.w $f22, $f22
mul.s $f25, $f22, $f18 #<<<F18 HERE IS WHAT I WANT TO CHANGE
round.w.s $f25, $f25
lh $s2, 0x0($s1)
mfc1 $s5, $f25
addu $s5, $s5, $s2 #add new red comp. to existing one
andi $s5, $s5, 0x1F #cap at 31
sh $s2, 0x0($s1) #store it
addiu $s1, $s1, 0x6C0 #next color
addiu $s2, $r0, 0x5 #bit shifter
andi $s5, $fp, 0x0003 #isolate counter
bnel $s5, $zero, calc_and_add_color #when fp reaches zero every color has been done
addiu $fp, $fp, -0x1
I read a tutorial about writing a bootloader. The author gave this as an example of a boot parameter block:
bootsector:
iOEM: .ascii "DevOS " # OEM String
iSectSize: .word 0x200 # bytes per sector
iClustSize: .byte 1 # sectors per cluster
iResSect: .word 1 # #of reserved sectors
iFatCnt: .byte 2 # #of FAT copies
iRootSize: .word 224 # size of root directory
iTotalSect: .word 2880 # total # of sectors if over 32 MB
iMedia: .byte 0xF0 # media Descriptor
iFatSize: .word 9 # size of each FAT
iTrackSect: .word 9 # sectors per track
iHeadCnt: .word 2 # number of read-write heads
iHiddenSect: .int 0 # number of hidden sectors
iSect32: .int 0 # # sectors for over 32 MB
iBootDrive: .byte 0 # holds drive that the boot sector came from
iReserved: .byte 0 # reserved, empty
iBootSign: .byte 0x29 # extended boot sector signature
iVolID: .ascii "seri" # disk serial
acVolumeLabel: .ascii "MYVOLUME " # volume label
acFSType: .ascii "FAT16 " # file system type
If I am using a FAT32 file system can I just change the last part (acFSType: ascii “FAT16 “) and use this boot parameter block? If not where can I get a boot parameter block for FAT32?
I asked Mike Saunders ( the author of Mike-OS) in an email and his answer was no. I can't use this table for FAT32 just by changing that (acFSType: ascii “FAT16 “)part. To get a boot parameter block for the FAT32 file-system he sent me this link to the Microsoft website.
Im writing a multiplexor of 4 bits as input and 1 as output. I have tray several ways, using cases, if, etc. but I keep getting this error:
WARNING:PhysDesignRules:367 - The signal <A<2>_IBUF> is incomplete. The signal
does not drive any load pins in the design.
WARNING:Par:288 - The signal A<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
And when I program in my circuit design card (Basys), everything works fine, but the switch that is assign to A[2], doesnt work, here are my modules:
module Multi_4_1(
input [3:0] A,
input [1:0] S,
output Z
);
wire w1, w2;
Multi_2_1 a(.A(A[0]), .B(A[1]), .SEL(S[0]), .F(w1));
Multi_2_1 b(.A(A[2]), .B(A[3]), .SEL(S[1]), .F(w2));
Multi_2_1 c(.A(w1), .B(w2), .SEL(S[1]), .F(Z));
endmodule
module Multi_2_1(
input A,
input B,
input SEL,
output F
);
assign F = (~SEL&A)|(SEL&B);
endmodule
And this is where I assign the terminals to the card, but this I have tried it with another projects and it works fine
NET "A[3]" LOC ="B4"; # sw3
NET "A[2]" LOC ="K3";
NET "A[1]" LOC ="L3"; # sw1
NET "A[0]" LOC ="P11"; # sw0, el de la derecha
NET "S[0]" LOC ="G3"; # sw4
NET "S[1]" LOC ="F3"; # sw5
NET "Z" LOC ="M5"; # L0, el de la derecha
Your multiplexer has an incorrect design.
This is your truth table:
S=00 => Z=A[0]
S=01 => Z=A[1]
S=10 => Z=A[3]
S=11 => Z=A[3]
Thus A[2] can never be an output, so it is 'unloaded', and your synthesis tool is warning you of this. You probably intend for Mux b to use sel(S[0]).