I would like to write a presolved problem into a file. Is there any way to do it?
write problem does not do it for me, it gives me the original problem that I read with SCIP.
The context is that I am working on SAT problems. The presolving phase of SCIP reduces the number of constraints and variables of the problem, effectively making the problem a little smaller. I would like to take a look at the presolved problem and compare it with the original problem and make some observations.
Yes, it is very easy, just use write transproblem.
The SCIP interactive shell also tells you all the possible commands that you can use, e.g. if you just type write in the SCIP shell, you see all available write commands
Related
I want to find my mistake in GAMS model. I don't have any errors , but my model doesn't work well
Is there any debugging tools in GAMS ?( like debugger tools in other software, e.g MATLAB)
Best
Unfortunately, I have not come across any.
If you have no errors in GAMS, it rather points to a modelling problem rather than a GAMS one. GAMS is like any other programming/modelling software, what you put in is what you get out. However, there are some commands and some intuitive ways you can find out the problem with your model:
One common way is by using the display and $stop commands. If you have loops within your GAMS code, it is best to track the progress of the loop by displaying some key variables either to your .lst file or using put utility (also a nice tool). I use the put utility, and write the code to display key variables at each point of my code to identify where things may have gone wrong.
The $stop command terminates your GAMS code at the line in which it is written.
Hope this helps.
I was wondering if there were a way to compute the size of a reg in Verilog. I researched it quite a bit, and found $size(a), but it's only in SystemVerilog, and it won't work in my verilog program.
Does anyone know an alternative for this??
I also wanted to ask as a side note; I'm having some trouble with my test bench in the sense that when I update a value in the file, that change is not taken in consideration when I simulate. I've been told I might have been using an old test bench but the one I am continuously simulating is the only one available in this project.
EDIT:
To give you an idea of what's the problem: in my code there is a "start" signal and when it is set to 1, the operation starts. Otherwise, it stays idle. I began writing the test bench with start=0, tested it and simulated it, then edited the test bench by setting start to 1. But when I simulate it, the start signal remains 0 in the waveform. I tried to check whether I was using another test bench, but it is the only test bench I am using in this project.
Given that I was on a deadline, I worked on the code so that it would adapt to the "frozen" test bench. I am getting now all the results I want, but I wanted to test some other features of my code, so I created a new project and copy pasted the code in new files (including the same test bench). But when I ran a simulation, the waveform displayed wrong results (even though I was using the exact same code in all modules and test bench). Any idea why?
Any help would be appreciated :)
There is a standardised way to do this, but it requires you to use the VPI, which I don't think you get on Modelsim's student edition. In short, you have to write C code, and dynamically link it to the simulator. In the C code, you can get object properties using routines such as vpi_get. Useful properites might be vpiSize, which is what you want, vpiLeftRange, vpiRightRange, and so on.
Having said all that, Verilog is essentially a static language, and objects have to be declared with a static width using constant expressions. Having a run-time method to determine an object's size is therefore of pretty limited value (since you should already know it), and may not solve whatever problem you actually have. Your question would make more sense for VHDL (and SystemVerilog?), which are much more dynamic.
Note on Icarus: the developers have pushed lots of SystemVerilog stuff back into the main language. If you take advantge of this you may find that your code is not portable.
Second part of your question: you need to be specific on what your problem actually is.
I would like to partially solve a MIP, clone the problem and have that copy of the problem continue optimization but with a different strategy (node selection rule, variable selection rule, etc), and keeping the current branch-and-bound tree. I know that this can't be done with either CPLEX or Gurobi, since they would start optimization from scratch in the copy.
Is there any way of doing this with SCIP?
I would really appreciate any help.
Best,
Rodolfo
If you don't insist on having a copy/clone, you always have the possibility to code your stopping criterion in terms of an event handler. I am sure you know our How to on adding event handlers.
There is also an event handler in the scip source code, the so-called soft time limit event handler src/scip/event_softtimelimit.c. There you can find sample code that changes the time limit after the first solution has been found. Parameters can be fed one by one by using the SCIPchg{Real,Bool,Int,Longint,Char,String}Param() methods in the code, or passed as a settings file, which might be easier if you want to change lots of parameters without adapting the code each time.
It is good practice to use settings files saved via the set diffsave command, which saves only the nondefault-settings. Otherwise, using a complete settings file, you might run into troubles because a time limit or memory limit gets changed without control.
A copy that includes data structures such as the tree used during the branch-and-bound solving process is currently not possible. The copy-mechanism of SCIP only allows to copy the problem as a whole and adjust the formulation by changing variable domains and/or objective coefficients.
I would like to use the LP relaxation of the problem before calling SCIPsolve() and I would like to know what is the best/simplest way of doing this.
I'm currently creating a SCIP_LPI that I would like to populate with my original problem's data. I thought that a simple way would be to call SCIPgetLPI() (and then copy everything), but when I write that problem to file (to see it) I get an empty problem. I guess this is because since I haven't called SCIPsolve() yet. I even tried calling SCIPpresolve() first, but the problem is still empty.
To get the LP relaxation I believe you will have to call SCIPsolve at some point. One way I see to do this and that does use SCIPsolve is to set the parameter limits/nodes to 1, call SCIPsolve, which will only solve the root node. Then you can set limits/nodes to -1 and call SCIPsolve again to solve completely if needed. Note that doing so will give you the LP relaxation of the presolved problem, and cuts will be added. Depending on what you would like to do, you may want to disable presolving and cuts.
The idea is that given a specific input to the program, somehow I want to automatically step-in through the complete program and dump its control flow along with all the data being used like classes and their variables. Is their a straightforward way to do this? Or can this be done by some scripting over gdb or does it require modification in gdb?
Ok the reason for this question is because of an idea regarding a debugging tool. What it does is this. Given two different inputs to a program, one causing an incorrect output and the other a correct one, it will tell what part of the control flow differ for them.
So What I think will be needed is a complete dump of these 2 control flows going into a diff engine. And if the two inputs are following similar control flows then their diff would (in many cases) give a good idea about why the bug exist.
This can be made into a very engaging tool with many features build on top of this.
Tell us a little more about the environment. dtrace, for example, will do a marvelous job of this in Solaris or Leopard. gprof is another possibility.
A bumpo version of this could be done with yes(1), or expect(1).
If you want to get fancy, GDB can be scripted with Python in some versions.
What you are describing sounds a bit like gdb's "tracepoint debugging".
See gdb's internal help "help tracepoint". You can also see a whitepaper
here: http://sourceware.org/gdb/talks/esc-west-1999/
Unfortunately, this functionality is not currently implemented for
native debugging, but I believe that CodeSourcery is doing some work
on it.
Check this out, unlike Coverity, Fenris is free and widly used..
How to print the next N executed lines automatically in GDB?