I am planning to use PIC18F26K83 and communicate with a smart battery that uses SMBus ver 1.1. So from the datasheet of PIC it says I need to choose appropriate input threshhold for SMBus from RxyI2C register. Bit 0 and 1 are being used for choosing that threshold but there is no information for SMBus ver 1.1 (See below.).
TH<1:0>: I2C Input Threshold Selection bits
11 = SMBus 3.0 (1.35 V) input threshold
10 = SMBus 2.0 (2.1 V) input threshold
01 = I2C specific input thresholds
00 = Standard GPIO Input pull-up, enabled via INLVLxy registers
And over the internet I couldn't find input threshold for SMBus v1.1. So my question is:
What is the input threshold voltage for SMBus v1.1? Or how should I set related bits in order to use SMBus v1.1 from RxyI2C register?
The datasheet of the IC PIC18F26K83.
States that the IC supports SMBus v2.0 and v3.0.
Comparing SMBus v2.0 and v1.1, there are some differences regarding voltage's, but the electrical differences on SMBus v1.1 and v2.0 should be close enough to work together.
As for backwardscompatibility, pay attention to the pull-up resistance for SMBus v1.1. Recommended Pull-up restitance of SMBus v2.0 is close to standard I2C and will therefore not work on SMBus v1.1.
Using the Microcontroller in configuration for SMBus 2.0 with pull-up resistance compatible with SMBus v1.1 should therefore work fine.
Following you have Link's to the documentation I've used to implement SMBus v1.1.
Smart batteryData
SMBus datasheet for each version of SMBus
ReadThis <- Implementing the SMBus Interface
Related
I am having a project that design a RISC V processor on DE10 kit and I've already created Verilog files for processor.
Because the processor has 32 bits data bus but the available external SDRAM has only 16 bits data, so how to connect them together?
DE10 Standard is a Cyclone V SoC, and SDRAM is controlled by the ARM HPS, you don't need to talk to it directly. The easiest way is to talk via Avalon bus (can be up to 128bit wide). You'll need to enable a port with a U-Boot script, see an example here
HPS clock frequency is higher than what you can get in your logic, so a 128bit bus is still an efficient way to talk to a DDR.
Now, you'll need to connect your 32 bit data bus to a wider data bus, not a more narrow one. For reading, you should be using a cache anyway, with a line width a multiple of 128bits.
I'm trying to learn how the SPI protocol works, and I'm working on a basic project using the STM32F407G-Discovery board.
This board has a built-in accelerometer (LIS3DSH), and it uses the SPI protocol. In the user manual, it states the following:
The LIS3DSH has ±2g/±4g/±6g/±8g/±16g dynamically selectable full-scale
and it is capable of measuring acceleration with an output data rate
of 3.125 Hz to 1.6 kHz.
This accelerometer is using SPI1, which is connected to APB2. I'm using STM32CubeMX to generate the initialization code (including the clock configuration), and it looks like the APB2 peripheral clock has a default value of 84 Mhz.
Does this mean that I need to configure the APB2 peripheral clock to have such a value that it falls between the range of 3.125 Hz and 1.6 kHz? I can't imagine this is true because I can't get the value low enough
in STM32CubeMX since it throws an error if I go too low.
I'm also accounting for the baud rate control SPI register, which allows you to go as low as f-PCLK/256.
In other words, I'm a bit stuck on which clock frequency to use and which baud rate control to use.
I'm still learning embedded programming, and so my terminology might be incorrect.
the two are not related. the max SPI clock rate is 10Mhz (page 14). The out rate of 3.125Hz to 1.6Khz is how fast the chip does an acceleration conversion. At 3.125Hz, a new conversion result is ready every 320ms, and at 1.6Khz, they are available every 625us. There is a trade off between conversion rates, power consumption and accuracy. The data sheet leaves a lot of holes, I would suggest reading the MMA7660 data sheet to get a better understanding of how these types of chips work and then revert back to your datasheet for implementation details.
You could use the SPI clock frequency with up to 10MHz to get data from this chip.
(So a prescaler of 16 and the full rate (84MHz) APB2 clock would be ok)
The SPI clock determines how fast the data is transferred from the chip to the controller not how fast the chip generated new results.
To always get the newest data you could use the IRQ lines from the chip or use an timer to trigger the transmission corresponding to sampling rate.
I have an mbed board with LPC 1768. I want to receive serial data from a zigbee adapter which works on 5V. The voltage beween the Rx Tx pin and ground of the adapter is around 4.99 V. Is it safe to connect it directly to the mbed board Rx, Tx.
Most of the LPC1768 pins are 5V tolerant, so you can connect them to a 5V system without damaging the CPU.
To make sure that the pins in question are indeed 5V tolerant check the data-sheet: http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf
All pins are listed in section 7.2. You may have to take a look at the mbed schematic to find out which CPU pins are used for your UART.
You also have to make sure that the 5V system will interpret the 3.3V output level of the LPC1768 as logic high levels. Most chips will work fine and interpret anything higher than 2.5V as logic high but there are some exceptions out there that need a higher level. Those won't be damaged but you won't be able to communicate with them without the help of a level-shifter.
i am doing a low power mode gps project for msp430fr5739 development board. this board's operating voltage is 3.3 volts and my gps module also can operate with 3.3 volts supplied power. How about effect of logic levels of UART protocol. do i have to use a logic level converter between gps module and msp430 ? or can i directly plug and play Adafuit gps ultimate board with msp430fr5739 development board
I have a embedded system which on boot up shows as below:
Clocking rate (Crystal/Core/MPU): 12.0/400/1000 MHz
Can anybody explain me on differences between these three clock rate.
Processor is ARMv7, OMAP3xxx
As Clement mentioned, the 12.0 is the frequency in MHz of the external oscillator. Core and MPU are the frequencies of the internal PLL's.
The MPU is the Microprocessor Unit Subsystem. This is the actual Cortex-A8 core as well as some closely related peripherals. So your MPU is running at 1000 MHz or 1GHz. This is similar to the CPU frequency in your computer.
In the AM335x, the Core PLL is responsible for the following subsystems: SGX, EMAC, L3S, L3F, L4F, L4_PER, L4_WKUP, PRUSS IEP, Debugss. The subsystems may differ slightly based on the particular chip you are working with. Yours is running at 400MHz. This can be thought of as similar to the Front Side Bus (FSB) frequency in your computer though the analogy isn't exact.
12 Mhz is the frequency of the crystal oscillator present on the board to give a time reference.
A TI OMAP contains 2 cores : an ARM and a DSP. The terminology used here is not clear but it may be the frequencies of these cores. Check you datasheet to be sure.