GPIO extra interrupt in STM32 - interrupt

I see in STM32F103 series, the GPIO extra interrupt is set to the EXTI. And GPIOx_0 (x=A,B,C...)is set to EXTI0. Take an example, if I want to use PA0 and PB0 as interrupt input,can I set them to EXTI0 at the same time? I mean in the EXTI0_Handler function I read the value of the input register of PA0 and PB0 to judge which one input a electrical level I want to carry different function by using if...else. I use it in STM8 successfully but there seems a little problem in STM32. Can you help me? Thanks.
The answer explains the problem clearly. The picture takes an example that why the four bits will be changed if you set different pins. You can see that the four bit affect by each other status if you config other pins. I ignore this problem before.

If you look into the STM32F103 Reference Manual p. 209, you will see that there is actually a multiplexer that decides if PA0, PB0, ... or PG0 is connected to the EXTI0 signal:
STM32F103 ExtI0 schematic
That means that you cannot connect both PA0 and PB0 to EXTI0. In fact, there are four specific bits in the alternate function input/output register (AFIO) which let you choose which pin is connected to the EXTI0 signal. Here, these bits are located in the control register AFIO_EXTICR1. See the AFIO register map in the same document for further information.
Now I don't know which setup you are using, but as I recall, I had separate functions for different interrupt request routines (for EXTI0, EXTI1 and so on).

Related

Using EXTI line for software event

I'm using STM32F4 and I want to generate a pulse. the question is how do I know the pulse is generated by set certain bit of swier in exti or not? is there any way to detect the generated pulse, or any alternative way to indicate that? how should I do to achieve that way with std library?
any code to config exti for soft event mode, and how to detect or indicate generated pulse
The "pulse generator" in the diagram is merely a description of how the event generation hardware works. It is not a user accessible function.
The difference between an interrupt and an event is not clear in ST's manuals, but an interrupt signals the NVIC, and will result in the associated handler code being executed, while an event is used to directly signal a peripheral device.
So here if the configured EXTI edge occurs, and the corresponding event mask bit is set, a pulse is generated signalling some other internal on-chip peripheral.
there any way to detect the generated pulse
Not in the context of that diagram. It is probably irrelevant to whatever it is you are trying to do.
how should I do to achieve that way with std library?
Classic X-Y problem, you have fixated a solution and are asking questions about the solution. You need to ask about the problem. Unfortunately it is entirely unclear what that problem is.
Moreover what "std library"? Are you using the older "standard peripheral library" or the abysmal CubeMX library?
If you want to simply generate an output pulse in response to an edge in an input, then most of the timer peripherals support that with zero software overhead. Search your parts reference manual for "One-pulse mode" in relation to any of the available timer peripherals.

what is the best way to design a shift register with stm32

I am using a STM32F031K6, clocked at 40MHz, and I want to design a program which acts as a looping shift register - an external trigger is used to clock it, the values in the shift register left shift every time a rising/falling edge is received. the output is one pin either high or low.
I need to make the time between the clocking edge and the output less than 0.5uS, or failing that as quick as possible. The values of the shift register can be changed and the length can also be changed, but for now I'm just starting with a byte like 11000010 .
I initially thought to implement this with an external interrupt but it was suggested there may be a better way to implement it
any help much appreciated
You might use the SPI peripheral of the STM32F0 for your task. When configured in slave mode, each time an external clock edge is detected on the SCK signal, the MISO will be set to the next bit of a value loaded into an internal shift register via the SPI data register.
Check out the chapter on the Serial peripheral interface (SPI) in STM32F0 reference manual.
Especially have a look at the sections addressing the following keywords:
General description: SPI block diagram
Slave Mode (Master selection: Slave configuration)
Simplex communication: Transmit-only mode (RXONLY=0)
Slave select (NSS) pin management: Software NSS management (SSM = 1)
Data frame format (data size can be set from 4-bit up to 16-bit length)
Configuration of SPI
The SPI unit is highly configurable, e.g. regarding the polarity of clock signal. Since it is an independent hardware unit, it should be able to handle your 0.5us reaction time requirement. The MCU firmware needs to set up the SPI unit and then provide new data to the SPI unit, each time the Tx buffer empty flag (TXE) is set. This can also be done by interrupt (TXEIE) or even using a DMA channel (TXDMAEN) with a circular buffer. In the latter case the "shift register functionality" runs completely independent of the MCU core (after setup).

Do every pin of a micro controller associated with a register?

I'm a beginner in the embedded system development world.
I would like some clarifications on the following questions.
Is every pin of a microcontroller (from here after referred to as mc) associated with a register?
Is it an one to one relationship?
How are ports (or groups of pins) assigned inside the mc?
Is it only possible to set a single pin low or high only?
No. Some pins are not associated with a register at all, e.g. Vcc and GND and if they do not have a dual use as a GPIO it also applies to clock/oscillator and reset pins.
If a pin is associated with registers, it is usually associated with several ones: one for determing the IO direction, one for reading the input, one or more for setting the output. For I2C, SPI, UART pins, the associated is indirect, i.e. the register mainly control the I2C/SPI/UART controller, which in turn is associated with the pin.
I don't understand the question
A GPIO pin can be set as input, as output in high state (delivering current or with a weak pull-up), as output in low state (sourcing current or with a weak pull-down) or in open-drain state (often similar to input mode). A pin can also be configured to be used by one fo the I2C/SPI/UART controllers or as DAC (outputting a variable voltage between GND and Vcc).
In addition to fundamental stuff like supply and clock pins, a MCU got numerous hardware peripherals internally. A hardware peripheral being something like a piece of GPIO (general-purpose input/output), ADC, UART, SPI etc. Each such hardware peripheral has a number of possible pins to which its functions can be routed.
Traditionally, these were pretty much fixed - if you wanted UART Tx then you would always get it on some fixed pin number, take it or leave it. Nowadays, most MCUs are quite flexible internally, allowing you to re-route hardware peripheral functionality to almost any pin you like, variably.
In either case, several hardware peripherals could share the same pin, and then it is MCU specific which one that takes precedence. For example GPIO could be present on the pin by default, but if you enable UART then maybe the MCU states that you get UART Tx on that pin instead.
As for the hardware peripheral called GPIO, they are almost always grouped in ports, where each port consists of a number of pins. Most often, port registers are either 8 bits or the size of the CPU's word length. Each bit in the various port registers corresponds to a pin.
You'll have a port data register, which is the actual read/write to the pin, a data direction register stating input or output, and then various other registers for interrupts, pull resistor enable etc etc.
Not all pins but all IOs (Input/Output) have a specific register.
Each IO has a specific group of registers. Bu also some registers may include specific bits which effects an IO or all IOs.
It depends of design of micro controller.
Yes it is.
I strongly recommend you to read some embedded hardware/software books(for example Newness Know It All books for embedded systems) and datasheets.

How would an ISR know what pin cause the interrupt?

Interrupts can be enabled for a specific pin(s) on a digital I/O port, correct? How would the ISR determine which pin caused the interrupt?
Because the vector table has only one slot for the Port1 ISR. So the same ISR function gets called no matter which input pin on Port1 needs attention unless I'm wrong...
As other people have suggested in comments this can be MCU dependent, but for ARM(The core behind MSP432) generally the answer is it doesnt know, it looks for it.
ARM has a vectored interrupt system, which means that every source has its own vector of interrupt, so CPU can easily find out which source is triggering thr interrupt. so far so good.
but then it happens that a device can trigger multiple interrupts, like GPIO as you said, in this case, CPU knows that which port has triggered interrupt so fires it's ISR but then it is ISR responsibility to poll device registers to figure out exact interrupt source, there are many of this peripherals with multiple interrupt, timers, DMAs just to name a few.
This is exactly why normally peripherals have an interrupt enable bit, that lets them trigger interrupts, but they also have bit masks that controls what exactly can trigger that interrupt internally,
Also have a look at this link for an in action example, specially at their ISR that does exactly the same as described above
In a typical MCU, there are hundreds, or at a stretch even thousands of potential interrupt sources. Depending on the application, only some will be important, and even fewer will be genuinely timing critical.
For a GPIO port, you typically enable only the pins which are interesting to generate an interrupt. If you can arrange only one pin of a port to be generating the interrupt, the job is done, your handler for that port can do the work, safely knowing that it will only be called when the right pin is active.
When you care about the cause within a single peripheral, and don't have the luxury of individually vectored handlers, you need to fall back on the 'non vectored' approach, and check the status registers before working out which eventual handler function needs to be called.
Interestingly, you can't work out which pin caused the interrupt - all you can see is which pins are still active once you get round to polling the status register. If you care about the phasing between two pulses, you may not be able to achieve this discrimination within a single GPIO unless there is dedicated hardware support. Even multiple exception vectors wouldn't help, unless you can be sure that the first exception is always taken before the second pin could become set.

Is it possible to do SPI operation using GPIO Pins?

I want to to execute the SPI protocol operation using GPIO Pins, want to configure to single slave operation, in which way I have to configure that, I am using STM32F100RB Microcontroller and Coocox IDE for this executing in windowsxp.
if any body have example source code regarding the configuration of SPI Protocol operation using GPIO pins, then please send me that.
it very helpful for my project, Thanks in advance.
Regards,
Pavan Neo.
You're asking about Bit banging. This is the process of using an IO (or several) to encode or decode a serial signal. Wikipedia has a good description of this process.
For SPI specifically, you will need two or three outputs (depending on whether or not chip select is needed) and one input. You'll have to ensure that your bits are set or read in the correct order to not violate any setup/hold requirements of your peripheral, and you'll need to pay attention to the polarity needed on the clock signal (to make sure you're reading/writing data on the correct edge).
The Wikipedia link has some example code for bit banging that you may find useful as a starting point.