Chisel HDL for CPLDs - hdl

Is it possible to use the Chisel HDL with a CPLD? If yes, have you
tried it, could you share experience please?

As Chisel generate Verilog code and the CPLD accept Verilog for synthesis, yes it's possible.
I tested it with a CoolRunnerII from Xilinx. That works well.

Related

Are there tools to auto-format Tcl source code?

I am using a vanilla vim editor to write Tcl source code. Are there any UNIX programs to aid in auto-formatting of Tcl source code, similar to rustfmt for Rust or gofmt for Go?
It's not normally done as it is in general very hard to figure out what is code and what isn't (for formal reasons; the code/data duality is a bit closer to the surface in Tcl than many other languages). But most code can be handled fairly easily as long as you're aware that there are cases it will get wrong. Those cases are probably rare in your code.

Is it possible to use cmake implement multi-core?

I am working on some cv algorithm code which is very computationally expensive. And the original code is not applied the multi-core or multi-threads tech. Is it possible to use cmake to recompile it and make it able to use multi-core?
Kind Regards,
Patrick

Testing my HDL Code (Verilog/VHDL) without an FPGA?

I've written a module in Verilog using vi as my editor and now I want to test it.
What are my options if I have no board?
How can I give my module inputs? Where can I see the results?
I have access to VCS by the way.
Thank you.
You are probably looking for a simulator.
First, you have to write a testbench which wraps around your Verilog module and drives the input signals. This testbench can also check that the output of your module matches the expected output. You can find many tutorials on writing testbenches online.
This testbench and your module are then "executed" in a simulator. I'm not familiar with all the options, but I know the free Xilinx ISE Web Pack includes a simulator.
Modelsim is a commercial package. They also offer a free student edition.
For anyone else who has the same question, I found a testbench tutorial, like Vortexfive suggested, in the link bellow:
http://www.asic-world.com/verilog/art_testbench_writing.html

What is a good VM for developing a hobby language?

I'm thinking about writing my own little language.
I found a few options, but feel free to suggest more.
JVM
Parrot
OSA
A lot of languages are using the JVM, but unless you write a Java-ish language, all the power the stdlib gives you is going to feel ugly; It's not very good at dynamic stuff either.
Parrot seems a good VM for developing languages, but it has a little abandoned/unfinished/hobby project smell to it.
OSA is what powers Applescript, not a particularly well known VM, but I use Mac, and it offers good system integration.
CLR+Mac doesn't seem a good combination...
My language is going to be an object orientated functional concurrent dataflow language with strong typing and a mix of Python and Lisp syntax.
Sounds good, eh?
[edit]
I accepted Python for now, but I'd like to hear more about OSA and Parrot.
One approach I've played with is to use the Python ast module to build an abstract syntax tree representing the code to run. The Python compile function can compile an AST into Python bytecode, which exec can then run. This is a bit higher level than directly generating bytecode, but you will have to deal with some quirks of the Python language (for example, the fundamental difference between statements and expressions).
In doing this I've also written a "deparse" module that attempts to convert an AST back to equivalent Python source code, just for debugging. You can find code in the psil repository if you're interested.
Have a look at LLVM. It's not a pure VM as such, more a framework with it's own IR that allows you to build high level VMs. Has nice stuff like static code analysis and JIT support
Lua has a small, well-written and fast VM
Python VM - you can really attach a new language to it if you want. Or write (use?) something like tinypy which is a small and simple implementation of the Python VM.
Both options above have access to useful standard libraries that will save you work, and are coded in relatively clean and modular C, so they shouldn't be hard to connect to.
That said, I disagree that Parrot is abandoned/hobby. It's quite mature, and has some very strong developers working on it. Furthermore, it's specifically a VM designed to be targeted by multiple dynamic languages. Thus, is was designed with flexibility in mind.
Have you considered Pypy? From what I've read, in addition to being a Python JIT Compiler, it also has the capability to handle other languages. For example there is a tutorial which explains how to create a Brainfuck JIT compiler using Pypy.

Analog circuit simulation library?

I'm working on a genetic programming tool and I'd like to evolve analog circuits. Can anyone suggest a library or tool or even a reference for hooking my GP code up? I just need some way to have something like SPICE evaluate the circuits that are created by my code. I've seen reference to plain text representations of the circuits (netlists) which are used by tools like SPICE. I'd like to know if there is a better way to connect to a simulator than to run it and pass the netlist on standard input. My code is written in C, in case you're wondering what sort of library I'm interested in.
Modelica has various circuit analysis capabilities.
SPICE is the reference electronics simulator.
I think it's mostly written in Forth, these days mostly using a Forth-to-C translator. I'd try to integrate it simply reading its text output to pick the values you want to {min/max}imize