I am working on ti-am335x BBB and trying to make an interrupt work at u-boot spl level(no os level).I read the flow of u-boot code from the following link... http://www.programering.com/a/MzMwcTNwATI.html
the thing i did is i defined "CONFIG_USE_IRQ" in the config files and removed all the dependencies errors like defining "arch_interrupt_init()". now here is the snapshot of start.S file...
"**
#ifdef CONFIG_USE_IRQ
.align 5
irq:
get_irq_stack
irq_save_user_regs
bl do_irq
irq_restore_user_regs
** "
now A/C to my understanding in case of irq pre-emption to the cpu core which is done by "enable_interrupt()" in the file arch/arm/lib/interrupt.c and interrupt arrival,
the above mentioned code should execute....
but, the problem is as soon as the interrupt is arriving the system is hanging.....,I am quite desperately looking for the reason this is happening..Any help,leads,links would be truley appreciated.
thanks in Advance,
sumit
Related
I try to get my SIM7070G Cat-M/NB-IoT/GPRS HAT running with micropython on a ESP32 MC via UART. Unfortunately I did not find any libraries but I thought this can not be too difficult with micropython. I am working on this problem now for 3 days and do not get any response when sending commands with uart.
USB with computer:
Sending AT commands gives an answer like sending AT and receiving OK.
Micropython:
from machine import UART
from time import sleep
sleep(1)
print("activate")
p = Pin(27, Pin.OUT, Pin.PULL_UP)
sleep(0.1)
p.on()
sleep(1)
p.off()
sleep(0.5)
print("activated")
uart = UART(1, 115200,rx=9,tx=10,timeout=5000)
#uart.init(9600, bits=8, parity=None,rx=25,tx=26,stop=1)
uart.write(b'AT\r\n')
print("uart.write(b'AT\r\n')")
sleep(1)
data = uart.any()
print(str(data))
I just do not get a response. data is always 0.
What I tried:
checked connection 100 times, TX->RX and RX->TX, 5V, GND, PWR
different pins did not work
different baudrate... no difference.
Anyone a solution? That would be really great.
Link to manufacturer of SIM7070G HAT
I figured out the solution. As #hcheung sais, I have to call AT command a few times (up until 10 times) to let the module get the baudrate. It will work than properly.
I am attempting to create a boot loader which allows me to update a processor's software remotely.
I am using keil uvision compiler (V5.20.0.0).
Flash.c, startup_efm32zg.s, startup_efm32zg.c and em_dma.c configured to execute from RAM (code, Zero init data, other data) via their options/properties tabs.
Stack size configured at 0x0000 0800 via the startup_efm32zg.s Configuration Wizard tab.
Using Silicon Labs flash.c and flash.h, removed RAMFUNC as this is redundant to Keil configuration, above.
I modified the flash.c code slightly so it stays in the FLASH_write function (supposedly in RAM) until the DMA is done doing its thing.
I moved the
while (DMA->CHENS & DMA_CHENS_CH0ENS);
line down to the end of the function and added a little wrapper around it like this:
/* Activate channel 0 */
DMA->CHENS = DMA_CHENS_CH0ENS;
if (DMA->CHENS & DMA_CHENS_CH0ENS)
{
/* Start the transfer */
MSC->WRITECMD = MSC_WRITECMD_WRITETRIG;
/* Wait until transfer is done */
while (DMA->CHENS & DMA_CHENS_CH0ENS)
{
//do nothing here
}
}
FLASH_init() is called as part of the initial setup prior to entering my infinite loop.
When called upon to update the flash.....
(1): I disable interrupts.
(2): I call FLASH_erasePage starting at 0x0000 2400. This works.
(3): I call FLASH_write.
FLASH_write(&startAddress, (uint32_t *)flashBuffer, (BLOCK_SIZE/4));
Where:
startAddress = 0x00002400,
flashBuffer = a buffer of type uint8_t flashBuffer[256],
#define BLOCK_SIZE = 256.
It gets stuck here in the function:
while (DMA->CHENS & DMA_CHENS_CH0ENS)
Eventually the debugger execution stops and the Call Stack clears to be left with 0x00000000 and ALL of memory is displayed as 0xAA.
I have set aside 9K of flash for the bootloader. After a build I am told:
Program size: Code=7524 RO-data=304 RW-data=664 ZI-data=3432
Target Memory Options for Target1:
IROM1: Start[0x0] Size[0x2400]
IRAM1: Start[0x20000000] Size:[0x1000]
So .... what on earth is going on? Any help?
One of my other concerns is that it is supposed to be executing from RAM. When I look in the in the Call Stack for the Location/Value for FLASH_write after having stepped into the FLASH_write function I see 0x000008A4. This is flash!(?)
I've tried the whole RAM_FUNC thing, too with the same results.
I have some experience of StdPeriph libraries usage for programming stm32. But now I tried STM32Cube HAL with STM32CubeMX code generator. I generated a project with this options:
Middleware: FreeRTOS and FatFS via SDIO
Compiler is GCC
stm32f103ret6 MCU
I imported generated code to Eclipse environment. I made a binary and flashed it with "st-flash write ..." as usual. My test program successfuly wrote to USART1 "Hello" in cycle - this is no problem. But then, when I tried to flash another code, it failed with "unknown chip id". If I manually connect NRST to GND, st-flash gives:
...Flash: 0 bytes (0 KiB) in pages of 2048 bytes
Full output:
2015-06-14T16:07:29 INFO src/stlink-common.c: Loading device parameters....
2015-06-14T16:07:29 INFO src/stlink-common.c: Device connected is: F1 High-density device, id 0x10036414
2015-06-14T16:07:29 INFO src/stlink-common.c: SRAM size: 0x10000 bytes (64 KiB), Flash: 0 bytes (0 KiB) in pages of 2048 bytes
I tried to use ST-Link Utility from Windows, but it cannot connect to this MCU to change option bytes (connection to another devices with stm32 works well).
I tried to flash through USART1, but it failed.
Source code I flashed, of course, does not contain any read/write protection enabling. I tried 2 another MCU, but this error was reproduced.
How can I unbrick by MCUs and flash anything?
I found a root cause!
This is a HAL initialization function, generated by STM32CubeMX:
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
/* System interrupt init*/
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
/**DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
I didn't notice this simple lines!
/**DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
This macros totally disables SWD and JTAG programming, look at stm321xx_hal_gpio_ex.h:
#define __HAL_AFIO_REMAP_SWJ_DISABLE() MODIFY_REG(AFIO->MAPR, AFIO_MAPR_SWJ_CFG, AFIO_MAPR_SWJ_CFG_DISABLE)
I didn't found any checkbox in CubeMX to disable/enable SWD/JTAG, so this is the only behavior of code generator! Pay attention to this point when using STM32CubeMX!
If you set the pin assignments for the JTAG/SWD pins correctly (e.g. SYS_JTDI, SYS_JTDO-TRACESWO, etc.) on the pinout tab of STM32CubeMX, the generated code will not disable JTAG/SWD.
It's (BURIED) under Pinout | SYS | Debug of STM32CubeMX...set to Serial Wire or whatever.
I am referring the TRM of DM3730 and modifying the pad configurations on an EVM 3530 accordingly. I couldn't understand the following properly.
1) What are CORE power domain and WKUP power domain?
2) What is core control module and Wake-Up control module?
3) The above two questions may be completely hardware-oriented. But the reason I'm asking is, in EVM 3530 source code, in pad configurations, certain pins are defined as PAD_ENTRY and certain others as WKUP_PAD_ENTRY. What makes the difference?
#define PAD_ENTRY(x,y) {PAD_ID(x),y,0},
#define WKUP_PAD_ENTRY(x,y) {WKUP_PAD_ID(x),y,0},
#define I2C3_PADS \
PAD_ENTRY(I2C3_SCL, INPUT_ENABLED | PULL_RESISTOR_DISABLED | MUXMODE(0)) \
PAD_ENTRY(I2C3_SDA, INPUT_ENABLED | PULL_RESISTOR_DISABLED | MUXMODE(0))
#define I2C4_PADS \
WKUP_PAD_ENTRY(I2C4_SCL, INPUT_ENABLED | PULL_RESISTOR_DISABLED | MUXMODE(0)) \
WKUP_PAD_ENTRY(I2C4_SDA, INPUT_ENABLED | PULL_RESISTOR_DISABLED | MUXMODE(0))
Any kind of guidance is welcome.
WKUP provides functions for sections of the OMAP SoC to come out of power-saving mode.
A power domain can be turned on/off without affecting others (4.1.3.2). WKUP power domain is continously active, it allows for switching others. CORE power domain comprises interconnect / memory / peripheral core functions.
Wake-up control module and core control module provide for save and restore of pad configurations (7.3) when switched off.
It looks like the pads which can be configured as I2C4 SCL/SDA can also be configured with wakeup capabilities. Then in your code base (Windows CE 6 BSP?) a different macro from generic PAD_ENTRY is appropriate, probably there is an error check of (x) to confirm pad ID is valid. The non-wakeup-related macro parameters should work the same for you, there won't be a difference.
Section references are to OMAP35x-TRM.
I’ve got a MCF5282 that I’m trying to use PDD4 as a GPIO on. In my setup code, I’ve got:
MCF5282_GPIO_DDRDD = 0x10; /* cs on dd4. */
MCF5282_GPIO_PORTDD = 0x10; /* active-low. */
And in my main loop, I’ve got:
MCF5282_GPIO_PORTDD = (mainloop_cnt & 0x10);
Which should give me a nice square wave on the oscilloscope, but the port doesn’t seem to be doing as I say. Am I missing some setup steps? I can’t find anything in the 5282 manual about a “Port DD pin-assignment register” to repurpose it from its “primary” role as DDATA.
Edit 2011-03-01: We never figured this out, we just used a different pin for GPIO.
You probably need to clear PSTEN in the Chip Configuration Register to disable DDATA, see page 27-4 of the MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual