In connection with a SPI bus there is typically a number of GDO pins used for interrupting the master or the slave of the SPI connection. But what is GDO an acronym for?
General Digital Output
See for example http://focus.ti.com/lit/ds/symlink/cc2500.pdf.
Related
I have a Gateway - Node application using the LoRa module but I don't know whether to choose the LoRa module to interface UART or SPI.
Can someone help me distinguish the difference when using these two types? Example: when I have 5 Nodes connected to Gatewway, which one should I use? and same when I have 50 Nodes.
Thanks!
A UART converts the signals to RS232 signaling(NOT VOLTAGES, You will need an additional adapter chip like the FTDI 232H) to hook up to a serial port on a computer. Speeds are usually limited to less than 400 Kilobits per second(varies based on distance and devices)
If you are connecting multiple devices to the same micro-controller(Arduino), use SPI. The connection speeds are not limited by standards. It is a bus arrangement with 4 pins (clock SCLK, input MISO, output MOSI and Slave select SS) The SCLK, MISO, MOSI are connected to all devices.To chain additional devices it requires an additional SS pin per device.
SPI is going to be faster(several (<5?)Megabits per second is not uncommon (depends on length(not greater than .3 meters), wire quality, environmental noise and device specifications) and requires less discrete components.
Since LoRa speeds max out around 300kbps, a single SPI connected gateway could theoretically handle 15 LoRa transceivers on a single gateway.
Doing 15 devices may violate local RF duty cycle restrictions resulting in fines and/or imprisonment.
Please check with your regulatory institutions prior to implementation of any solution.
I would suggest using four transceivers with external antennas each pointing in a different cardinal direction(possibly offset) at each gateway. This configuration should permit 400+(depending on usage patterns) client devices per gateway.
I'm learning embedded development, and I'm trying to communicate with the accelerometer (LIS3DSH) on the discovery board using the SPI protocol. I'm only using CMSIS headers so that I'm forced to interact directly with the registers.
According to the schematics, these are the pins being used by the board for communication with the accelerometer:
PA5: SPI1_SCK
PA7: SPI1_MOSI
PA6: SPI1_MISO
PE3: CS_I2C/SPI
From my theoretical understanding of the SPI protocol, whenever I want to receive or transmit data between the master and the slave, I first need to pull the CS pin (PE3) down and then start the communication. This seems to be confirmed by the LIS3DSH user manual as well.
But now I'm confused about what the meaning of SSM is. According to the board's user manual, this is what the software slave management bit does:
When the SSM bit is set, the NSS pin input is replaced with the value from the SSI bit.
The NSS pin is nothing but the slave select pin, right? Which means it is PE3 in this case.
The SSI bit is bit 8 on the SPI_CR1 register. Does this mean I should instead toggle this SSI bit instead of PE3? That doesn't make sense because how would board know that the PE3 is the relevant CS pin?
So how are the CS pin/line and the SSM bit related, if at all?
If they're not related, do I need to configure the PE3 pin with alternate function mode and and as a pull-up, and then pull it low every time I need to communicate using SPI with the accelerometer?
The NSS pin is an input used as a CS by some other device when the SPI peripheral is in slave mode, or can be used as an output to support multi-master configurations.
If you are operating the SPI in single-master mode, the pin is not used at all.
Moreover SPI1_NSS is an alternate function of PA4 or PA15 so not related to the CS GPIO on PE3 in your case. In master mode, any number of available GPIO pins may be used as CS lines for each peripheral on the same SPI bus, and is driven in software - it is not an "alternate function", and not part of, or controlled by, the SPI peripheral.
I'm looking to create a device that acts as a host to a USB peripheral, format the data, then send it out to another host (the PC). Are on-the-go chips capable of accomplishing this or would you need to implement both a host USB microcontroller and a peripheral USB controller? I don't see much information out there for creating a middleman that performs data molding for USB prior to reaching a host. Any information would be appreciated, hopefully I didn't butcher this concept.
you should use a microcontroller with 2 USB busses.
One should act as a host, and the other as a slave.
You will need to implement them both.
USB OTG is used to create a host and a slave in 1 device with 1 connector,
so it's impossible to use them together at the same time.
I am working with ADE7953 metering IC and I use the uart serial communication in raspberry pi to communicate with the IC and i have wiring pi installed in it.Can anyone help me regarding how to configure the IC.
You need to check the datasheets and look for the MODE register configuration. Also take care for the active energy line cycle accumulation mode registers to set before you take IRMS or VRMS any of the ENERGY register
The ADE7953 contains a detection system that automatically
detects which of the three communication interfaces is being
used.
The CS pin (Pin 28) is used to determine whether the
communication method is SPI. The pin must be low
during the SPI communication for this interface method.
The CS pin is active low and will automatically lock onto
SPI communication as a result.
The SCLK pin (Pin 25) is used to determine whether the
communication method is I2
C or UART. If this pin is held
high, the communication interface is set to I
2
C; if it is held
low, the communication interface is set to UART.
Now, for UART should be configured in hardware as pin28 should be high, pin25 should be low, pin 27 Rx and pin 26 Tx
I'm trying to interface the Mindwave (http://store.neurosky.com/products/mindwave-1) with my Altys board, through the USB UART port. The dongle I'm trying to connect is basically a wireless reciever that outputs serial data stream on the USB connection. I'm trying to read in this serial stream on the FPGA.
The problem I'm seeing is that when I try to Chipscope the UartRx pin (A16), I see no activity on it even though the dongle is supposed to send 0xAA in standby mode.
Since the FPGA does not power the dongle, I have it connected to an external power USB hub and then connect the hub to the FPGA. However I don't see any activity.
Do I need to convert the signals to another level, or invert them? I thought the EXAR chip takes care of it.
Did you try swapping RX and TX?
Did you have acces to a scope? To check you can repeatly send 'U's (0x55) and look with a scope to see which line is RX and which is TX. You can also check the speed of the interface with this method.