Pic18F67K22 Unable to set SPBRGH1 - uart

Question

PIC1867K22 # 64 Mhz with MPLAB 8.92.
Trying to set baud rate to 9600 and unable to get the SPBRGH1 register to change its stuck on 0xC2. Set ports RC6, RC7 as needed or I/0. The UART sends and receives data but wrong baud. Using 16 byte baud rate
movlw b'10010000' ;// UART RC.6 RF TX out
MOVWF TRISC
banksel TXSTA1
movlw b'10000100' ;// 9600 baud
movwf TXSTA1
bsf BAUDCON1,3 ;// 16 byte
bcf BAUDCON1,5 ;// Data NOT inverted (Rx)
bcf BAUDCON1,4 ;// Data NOY inverted (Tx)
movlw 0x66 ;// 64 mhz
movwf SPBRG1
movlw 0x16
movwf SPBRGH1
movlw b'10010000'
movwf RCSTA1 ;//Enable Serial

Answer 1

The PIC18F67K22 has all of the Special Function Registers located in memory common to all banks.
I suspect that whatever your problem is, it may on be in the code you have yet posted.
This complete application will setup the UART and build with MPASM:
list n=0,c=250 ; Make list file look pretty
list r=dec ; use decimal numbers as the default
;
; Author : Dan1138
; Date : 2021-APRIL-06
; Target : PIC18F67K22
; IDE : MPLAB v8.92
; Compiler : MPASM
; PIC18F67K22
; +---------------+ +---------------+ +---------------+ +---------------+
; <> : 1 RE1 : <> : 17 RF1/AN6 : <> : 33 RC2/ECCP1 : <> : 49 RD7 :
; <> : 2 RE0 : 3v3 -> : 18 ENVREG : <> : 34 RC3/SCL1 : <> : 50 RD6/SCL2 :
; <> : 3 RG0/ECCP3 : 3v3 -> : 19 AVDD : <> : 35 RC4/SDA1 : <> : 51 RD5/SDA2 :
; <> : 4 RG1/AN19 : GND -> : 20 AVSS : <> : 36 RC5 : <> : 52 RD4 :
; <> : 5 RG2/AN18 : <> : 21 RA3/AN3 : IDC_PGD <> : 37 RB7/PGD : <> : 53 RD3 :
; <> : 6 RG3/AN17 : <> : 22 RA2/AN2 : 3v3 -> : 38 VDD : <> : 54 RD2 :
; ICD_VPP -> : 7 RG5/MCLR : <> : 23 RA1/AN1 : <> : 39 RA7/OSC1 : <> : 55 RD1 :
; <> : 8 RG4/AN16 : <> : 24 RA0/AN0 : <> : 30 RA6/OSC2 : GND-> : 56 VSS :
; GND -> : 9 VSS : GND -> : 25 VSS : GND -> : 41 VSS : 3v3-> : 57 VDD :
; 10uF -> : 10 VCAP : 3v3 -> : 26 VDD : ICD_PGC <> : 42 RB6/PGC : <> : 58 RD0 :
; <> : 11 RF7/AN5 : <> : 27 RA5/AN4 : <> : 43 RB5 : <> : 59 RE7/ECCP2 :
; <> : 12 RF6/AN11 : <> : 28 RA4/T0CKI : <> : 44 RB4 : <> : 60 RE6/CCP6 :
; <> : 13 RF5/AN10 : <> : 29 RC1/SOSCI : <> : 45 RB3 : <> : 61 RE5/CCP7 :
; <> : 14 RF4/AN9 : <> : 30 RC0/SOSCO : <> : 46 RB2 : <> : 62 RE4/CCP8 :
; <> : 15 RF3/AN8 : <> : 31 RC6/TX1 : <> : 47 RB1/INT1 : <> : 63 RE3/CCP9 :
; <> : 16 RF2/AN7 : <> : 32 RC7/RX1 : <> : 48 RB0/INT0 : <> : 64 RE2/CCP10 :
; +---------------+ +---------------+ +---------------+ +---------------+
; TQFP-64
;
; Include definitions of the special function registers
;
#include "p18f67k22.inc"
;
; Initialize all of the configuration word bits
;
; CONFIG1L
CONFIG RETEN = ON ; VREG Sleep Enable bit (Enabled)
CONFIG INTOSCSEL = HIGH ; LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
CONFIG SOSCSEL = HIGH ; SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
CONFIG XINST = OFF ; Extended Instruction Set (Disabled)
; CONFIG1H
CONFIG FOSC = INTIO2 ; Oscillator (Internal RC oscillator)
CONFIG PLLCFG = OFF ; PLL x4 Enable bit (Disabled)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor (Disabled)
CONFIG IESO = OFF ; Internal External Oscillator Switch Over Mode (Disabled)
; CONFIG2L
CONFIG PWRTEN = OFF ; Power Up Timer (Disabled)
CONFIG BOREN = OFF ; Brown Out Detect (Disabled in hardware, SBOREN disabled)
CONFIG BORV = 3 ; Brown-out Reset Voltage bits (1.8V)
CONFIG BORPWR = ZPBORMV ; BORMV Power level (ZPBORMV instead of BORMV is selected)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
CONFIG WDTPS = 1048576 ; Watchdog Postscaler (1:1048576)
; CONFIG3L
CONFIG RTCOSC = SOSCREF ; RTCC Clock Select (RTCC uses SOSC)
; CONFIG3H
CONFIG CCP2MX = PORTC ; CCP2 Mux (RC1)
CONFIG MSSPMSK = MSK7 ; MSSP address masking (7 Bit address masking mode)
CONFIG MCLRE = ON ; Master Clear Enable (MCLR Enabled, RG5 Disabled)
; CONFIG4L
CONFIG STVREN = ON ; Stack Overflow Reset (Enabled)
CONFIG BBSIZ = BB2K ; Boot Block Size (2K word Boot Block size)
; CONFIG5L
CONFIG CP0 = OFF ; Code Protect 00800-03FFF (Disabled)
CONFIG CP1 = OFF ; Code Protect 04000-07FFF (Disabled)
CONFIG CP2 = OFF ; Code Protect 08000-0BFFF (Disabled)
CONFIG CP3 = OFF ; Code Protect 0C000-0FFFF (Disabled)
CONFIG CP4 = OFF ; Code Protect 10000-13FFF (Disabled)
CONFIG CP5 = OFF ; Code Protect 14000-17FFF (Disabled)
CONFIG CP6 = OFF ; Code Protect 18000-1BFFF (Disabled)
CONFIG CP7 = OFF ; Code Protect 1C000-1FFFF (Disabled)
; CONFIG5H
CONFIG CPB = OFF ; Code Protect Boot (Disabled)
CONFIG CPD = OFF ; Data EE Read Protect (Disabled)
; CONFIG6L
CONFIG WRT0 = OFF ; Table Write Protect 00800-03FFF (Disabled)
CONFIG WRT1 = OFF ; Table Write Protect 04000-07FFF (Disabled)
CONFIG WRT2 = OFF ; Table Write Protect 08000-0BFFF (Disabled)
CONFIG WRT3 = OFF ; Table Write Protect 0C000-0FFFF (Disabled)
CONFIG WRT4 = OFF ; Table Write Protect 10000-13FFF (Disabled)
CONFIG WRT5 = OFF ; Table Write Protect 14000-17FFF (Disabled)
CONFIG WRT6 = OFF ; Table Write Protect 18000-1BFFF (Disabled)
CONFIG WRT7 = OFF ; Table Write Protect 1C000-1FFFF (Disabled)
; CONFIG6H
CONFIG WRTC = OFF ; Config. Write Protect (Disabled)
CONFIG WRTB = OFF ; Table Write Protect Boot (Disabled)
CONFIG WRTD = OFF ; Data EE Write Protect (Disabled)
; CONFIG7L
CONFIG EBRT0 = OFF ; Table Read Protect 00800-03FFF (Disabled)
CONFIG EBRT1 = OFF ; Table Read Protect 04000-07FFF (Disabled)
CONFIG EBRT2 = OFF ; Table Read Protect 08000-0BFFF (Disabled)
CONFIG EBRT3 = OFF ; Table Read Protect 0C000-0FFFF (Disabled)
CONFIG EBRT4 = OFF ; Table Read Protect 10000-13FFF (Disabled)
CONFIG EBRT5 = OFF ; Table Read Protect 14000-17FFF (Disabled)
CONFIG EBRT6 = OFF ; Table Read Protect 18000-1BFFF (Disabled)
CONFIG EBRT7 = OFF ; Table Read Protect 1C000-1FFFF (Disabled)
; CONFIG7H
CONFIG EBRTB = OFF ; Table Read Protect Boot (Disabled)
;
; Define what we are going to setup as the system oscillator frequency
;
#define FSYS (64000000)
#define FCY (FSYS/4)
;
; Reset vector
;
RES_VECT CODE 0x0000 ; processor reset vector
GOTO START ; go to beginning of program
;
; High priority interrupt vector
;
ISR_HIGH_VECTOR code 0x00008
goto ISR_HIGH_HANDLER
;
ISR_LOW_DATA udata_acs
wreg_temp: res 1
status_temp: res 1
pclath_temp: res 1
;
; Low priority interrupt handler
;
ISR_LOW_VECTOR code 0x00018
ISR_LOW_HANDLER:
movwf wreg_temp ; save off current W register contents
movf STATUS,w ; move status register into W register
clrf STATUS ; force to bank zero
movwf status_temp ; save off contents of STATUS register
movf PCLATH,W
movwf pclath_temp
movlw HIGH(ISR_LOW_HANDLER)
movwf PCLATH
; isr code can go here or be located as a called subroutine elsewhere
movf pclath_temp,W
movwf PCLATH
movf status_temp,w ; retrieve copy of STATUS register
movwf STATUS ; restore pre-isr STATUS register contents
swapf wreg_temp,f
swapf wreg_temp,w ; restore pre-isr W register contents
retfie ; return from interrupt
;
; High priority interrupt handler
;
ISR_HIGH_HANDLER:
retfie FAST
;
; Main application
;
MAIN_PROG CODE
;
; Turn off interrupts
; Make all GPIO pins digiatl outputs
;
START:
clrf INTCON
movlw 0x70
MOVWF OSCCON
clrf OSCTUNE
bsf OSCTUNE,PLLEN
;
clrf ANCON0
clrf ANCON1
clrf ANCON2
;
clrf LATA
clrf LATB
clrf LATC
clrf LATD
clrf LATE
clrf LATF
clrf LATG
clrf TRISA
clrf TRISB
clrf TRISC
clrf TRISD
clrf TRISE
clrf TRISF
clrf TRISG
;
; Setup UART1
;
#define U1_BAUD 9600
#define U1_BRGH_VALUE 1
#define U1_BRG16_VALUE 1
;
; Compute the value for the UART1 baud rate registers
;
#if U1_BRG16_VALUE
#if U1_BRGH_VALUE
#define U1_BRGH_SCALE 1
#else
#define U1_BRGH_SCALE 4
#endif
#else
#if U1_BRGH_VALUE
#define U1_BRGH_SCALE 4
#else
#define U1_BRGH_SCALE 16
#endif
#endif
#define U1_SPBRG_VALUE (((FCY+(U1_BRGH_SCALE*U1_BAUD/2))/(U1_BRGH_SCALE*U1_BAUD))-1)
#if U1_BRG16_VALUE
#if (U1_SPBRG_VALUE >> 16)
error "Cannot set up UART1 for the FCY and BAUDRATE."
#endif
#else
#if (U1_SPBRG_VALUE >> 8)
error "Cannot set up UART1 for the FCY and BAUDRATE."
#endif
#endif
;
; Check if the real baud rate is within 2.5 percent of the require baud rate
;
#define REAL_BAUDRATE (FCY/(U1_BRGH_SCALE*(U1_SPBRG_VALUE+1)))
#if (REAL_BAUDRATE > (U1_BAUD+(U1_BAUD*25)/1000))
error "UART baudrate error greater than 2.5 percent for the FCY and U1_BAUD."
#endif
#if (REAL_BAUDRATE < (U1_BAUD-(U1_BAUD*25)/1000))
error "UART baudrate error greater than 2.5 percent for the FCY and U1_BAUD."
#endif
;
bsf LATC,LATC6 ; Set U1_TXD high
bsf TRISC,TRISC7 ; Set U1_RXD as digital input
clrf TXSTA1
clrf RCSTA1
clrf BAUDCON1
#if (U1_BRG16_VALUE)
bsf BAUDCON1,BRG16
#endif
#if (U1_BRGH_VALUE)
bsf TXSTA1,BRGH
#endif
#if (U1_BRG16_VALUE)
movlw HIGH(U1_SPBRG_VALUE)
movwf SPBRGH1
#endif
movlw LOW(U1_SPBRG_VALUE)
movwf SPBRG1
bsf TXSTA1,TXEN
bsf RCSTA1,CREN
bsf RCSTA1,SPEN
;
; Send a "Start" message
;
movlw 0x0d
call U1_Putc
movlw 0x0a
call U1_Putc
movlw 'S'
call U1_Putc
movlw 't'
call U1_Putc
movlw 'a'
call U1_Putc
movlw 'r'
call U1_Putc
movlw 't'
call U1_Putc
movlw 0x0d
call U1_Putc
movlw 0x0a
call U1_Putc
;
; Application process loop
;
AppLoop:
GOTO AppLoop
;
; Send a character out UART
;
U1_Putc:
btfss TXSTA1,TRMT
bra U1_Putc
movwf TXREG1
return
END