specifying a make variable in a rule - variables

Question

I would like to set a variable $(CFLAGS2) to hold different values depending on the target i make. Specifically, i want to have a target which compiles my project with "-g -Wall", and another one which compiles with "-O3"
I tried it like this:
CC=gcc
COPT=-c $< -o $# $(CADD) $(CFLAGS) $(CFLAGS2)
.PHONY: opti
.PHONY: debi
opti: seto
make hammingtest
debi: setd
make hammingtest
.PHONY: seto
seto:
$(eval CFLAGS2 := -O3)
.PHONY: setd
setd:
$(eval CFLAGS2 :=-g -Wall)
hamming.o: hamming.cpp hamming.h
$(CC) $(COPT) $(DEFS) $(CFLAGS2)
hammingtest.o: hammingtest.cpp hamming.h
$(CC) $(COPT) $(DEFS) $(CFLAGS2)
hammingtest: hammingtest.o hamming.o
$(CC) -o hammingtest hammingtest.o hamming.o
But when i do "make debi" it acts as if $(CFLAGS") was not set at all (the same with "make opti")
How can i achieve this?

Answer 1

Do not use $(eval ...) in shell lines. That is usually just plain wrong.
There is a number of ways to do what you want. Since you already have recursive make set up, you could use command-line variables:
opti:
${MAKE} COPTS2='-O3' hammingtest
debi:
${MAKE} COPTS2='-g -Wall' hammingtest
A better style is to eschew the recursive make, maybe in favour of target specific variables:
CC=gcc
COPT=-c $< -o $# $(CADD) $(CFLAGS) $(CFLAGS2)
CFLAGS2 = $(error Someone tried to deref CFLAGS2!)
opti: CFLAGS2 := -O3
debi: CFLAGS2 := -g -Wall
.PHONY: all
all:
#echo 'What do you want to make?'
.PHONY: opti debi
opti debi: hammingtest
opti debi: ; #echo $# Success
.
.
.
This looks likely to work at a cursory glance.
The way this is set up though is problematic. For example, the following sequence of shell commands will give you an optimised build, with no warnings.
$ make opti
$ make debi