LLVM compiler infrastructure for VLIW architectures [closed] - cross-platform

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Do you know how strong VLIW architectures (or EPIC, like Itanium) support exists in LLVM compiler infrastructure?
Are there good documents/slides materials on this?

There is no good VLIW support in the base LLVM at the moment. / 2010-11
Some useful posts:
http://old.nabble.com/VLIW-Scheduling-td857833.html
http://old.nabble.com/vliw-compatability-td27935919.html
UPDATE / 2012-01
LLVM added (seems after 3.0 release; by Anshuman Dasgupta) initial support of an "VLIW packetizer" aka DFApacketizer to target-independent codegenerator support infrastructure:
http://llvm.org/docs/CodeGenerator.html#vliw_packetizer
To generate tables for a VLIW target, add TargetGenDFAPacketizer.inc as a target to the Makefile in the target directory. The exported API provides three functions:
DFAPacketizer::clearResources(),
DFAPacketizer::reserveResources(MachineInstr *MI), and
DFAPacketizer::canReserveResources(MachineInstr *MI).
These functions allow a target packetizer to add an instruction to an existing packet and to check whether an instruction can be added to a packet. See llvm/CodeGen/DFAPacketizer.h for more information.
Machine Instruction Bundle in LLVM thread by Evan Cheng in mailing list com.googlegroups.llvm-dev from dec 2 2011, describing basic LLVM VLIW (Bundle) support. They are planned to be in LLVM 3.1, and are documented here.
Also, in 3.1 "new TableGen infrastructure to support bundling for Very Long Instruction Word (VLIW) architectures." is added.
There are some VLIW compilers based on LLVM today; but target-independent (generic) VLIW support is in the very beginning of its long path.
UPDATE 2012/12
There are some slides from Quic: http://llvm.org/devmtg/2012-11/Larin-Trick-Scheduling.pdf

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Looking for RSA C bare-metal implementation (for STM32) [closed]

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I'm looking for a bare-metal C implementation of RSA signature verification. If possible I need an implementation without dynamic allocation. The target is STM32H753.
I know there is a crypto library from STMicro providing RSA but source code is not available and anyway it doesn't seem available for STM32H7.
I had a look on github but it's hard to assess the projects quality.
EDIT: according to STMicro support there is a cryptolib patch to use it on STM32H7
STM32 has no hardware RSA support (only DES and AES), but any plain C software implementation would work. If you are unsure of the quality of a library, Information Security SE might be a better place to ask about a specific library.
There is a hardware random number generator, which you can use e.g. instead of the rand() library function. Mind the recommended clock settings in the Entropy source validation chapter of the Reference Manual.
Take a look at ARM Mbed TLS: https://tls.mbed.org/kb/how-to/encrypt-and-decrypt-with-rsa
Source code: https://github.com/ARMmbed/mbedtls
License file shows it is open source Apache 2.0.
I've used this library for SHA-256 hashing before on an STM32 mcu (withOUT using Mbed--its just a library after-all) and it worked great. (4 examples of doing the SHA-256 hash: https://os.mbed.com/teams/mbed-os-examples/code/mbed-os-example-tls-hashing/file/c68a6dc8d494/main.cpp/)

Are there alternatives to embsysregview? [closed]

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http://embsysregview.sourceforge.net/
I'd like to avoid using eclipse if I can. Tried googling - nothing came up.
The debuggers of most commercial vendors will provide that functionality, for example Kiel MDK-ARM, IAR EWB, Rowley Associates CrossWorks.
Keil and IAR both provide code-size limited evaluation versions that you can use for non-commercial and evaluation purposes (i.e. you can't sell or distribute a product built using it), Rowley have a 30 day evaluation licence (as does IAR in addition to teh code limited version). For a full licence Rowley is by far the least expensive - largely because they use GCC rather than a proprietary compiler, but the debugger is their own and not based on GDB (and all the better for it!).
If you need free tools, CooCox CoIDE appears to do exactly what you want (and probably more). It is Eclipse based, so may not meet your requirements, but all the integration is already done for you, so it is less of a kit-of-parts than assembling Eclipse with CDT and various other plug-ins. In particular the embedded target debugging is integrated, and that is probably the most difficult part to get information on for Eclipse in my experience.

Lisp on embedded platforms [closed]

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Are there any open source Lisp compilers suitable for real-time embedded applications? I.e. with incremental garbage collection, customisable memory handling, small footprint, etc.
Edit:
To clarify, by "compiler" I meant native code, not bytecode interpreter (though the suggested interpreting implementations for microcontrollers are interesting for being a lot smaller than what I thought possible!).
Take a look at Picobit and the code, which is a Scheme for microcontrollers. There is also tinyscheme, but I don't know how suitable it is for embedding into smaller processors.
There are some implementations that compile to C code, e.g. ECL (Embeddable Common Lisp). There is also a very recent library that compiles a subset of Common Lisp to a subset of C++ for the Arduino.
You mentioned "real-time" so nonchalantly, but getting real-time with garbage collection is not trivial. There do exist real-time garbage collectors, but I am not aware of any Lisp implementations using them yet.
There is also Hedgehog Lisp from Oliotalo, licensed under LGPLv2.1, with standard library licensed under BSD.

CUDA: documentation of kernel CRT? [closed]

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I'm trying to find the documentation for all of the functions available for the CUDA kernels.
The CUDA Reference manual seem to include only the host functions and the CUDA programming guide only includes some details such as the accuracy of these functions but not their documentation.
Am I missing something or does this piece of documentation simply doesn't exist?
Appendices B and C of the CUDA Programming Guide contain documentation for functions that can be executed within kernels. Mostly they are for things like texture fetches, atomic instructions, warp voting, synchronization, and C standard library mathematical operations.
The documentation is very sparse because the meaning of these functions is described elsewhere, in the C standard library documentation. Some of these functions are quite esoteric. The meaning of others can be guessed at from the name. For the ones that you do not recognize, you can google for the man page with a query such as "site:opengroup.org nextafter". If you are on a *nix machine and have the C library documentation installed, typing man nextafter will also work.

Lua's bytecode specification [closed]

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Can anyone tell me where to find Lua's bytecode specification? I've been searching for 15 minutes, and I can't find anything.
The official definition is in lopcodes.h.
Maybe A No-Frills Introduction to Lua 5.1 VM Instructions contains what you're looking for?
There is also a table of the Lua 5.0 instruction set (Figure 5) in:
Ierusalimschy, R.; Figueiredo, L. H.; Celes, W. (2005), "The implementation of Lua 5.0", J. of Universal Comp. Sci. 11 (7): 1159-1176
You can find the full text with a search on Google Scholar and I believe it's on lua.org as well. This reference is used by the Lua page on Wikipedia, which is always a good place to look for such things. :-)
The only specifications for Lua are the language, standard libraries, and the C API. The creators of Lua intentionally left the VM unspecified for a couple main reasons:
Lua can be fully implemented with any underlying architecture (VM, interpreter, compiler, etc.)
The official Lua distribution doesn't have to worry about maintaining VM compatibility between versions
This means, for example, that you generally shouldn't use the Lua VM as a target for a compiler. If you'd like to know how the official Lua distribution's VM works as an example for your own curiosity, see the other answers.
You can read The Implementation of Lua 5.0 online.